From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on gnuweeb.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gnuweeb.org (Postfix) with ESMTPS id 5AE397E2DF for ; Tue, 22 Mar 2022 13:25:12 +0000 (UTC) Authentication-Results: gnuweeb.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=RKEiC+K4; dkim-atps=neutral DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1647955512; x=1679491512; h=date:from:to:cc:subject:message-id:mime-version; bh=lWXVrca+VfCcFsSg7/+CoGYp9Og1yz0JFXNobcYW3so=; b=RKEiC+K48uGkWhBflnWYsmC4J7swStWxeXOuAZRraDH7wikgXkkmMKlr hZzFJcw55aihHbeKKuW+U3qlL4BL5L0kQ1P6X2l0wBPq/iohf18LTbaSa n4BotdYWzb+zuKLops0StqMrs8lgk4oPF4azV2f5bZKL3NeVtMXB54q2H P2pYBNRsIC3mdaxOhpugvY9iha2JxcKBYxUOZr1zlmKMKUzjzM4HA0YAn nWOnNQbZbD7BCUdVB/obtmzm29YhulDaqnn0BdBX29j8f4lbGAuzfrm/9 Gn/5tCRzf9kAP9teg+9FDsjPhh65/3jT/0qlQMkrg00PqjLLNkXlWidQI A==; X-IronPort-AV: E=McAfee;i="6200,9189,10293"; a="257532302" X-IronPort-AV: E=Sophos;i="5.90,201,1643702400"; d="scan'208";a="257532302" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Mar 2022 06:24:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,201,1643702400"; d="scan'208";a="560382844" Received: from lkp-server02.sh.intel.com (HELO 89b41b6ae01c) ([10.239.97.151]) by orsmga008.jf.intel.com with ESMTP; 22 Mar 2022 06:24:48 -0700 Received: from kbuild by 89b41b6ae01c with local (Exim 4.92) (envelope-from ) id 1nWeVE-000Iqx-0Q; Tue, 22 Mar 2022 13:24:48 +0000 Date: Tue, 22 Mar 2022 21:24:04 +0800 From: kernel test robot To: Atish Patra Cc: kbuild-all@lists.01.org, GNU/Weeb Mailing List , linux-kernel@vger.kernel.org, Palmer Dabbelt , linux-doc@vger.kernel.org Subject: [ammarfaizi2-block:palmer/linux/riscv-pmu 13/15] drivers/perf/riscv_pmu_sbi.c:498: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst Message-ID: <202203222137.eK8TFhiJ-lkp@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.10.1 (2018-07-13) List-Id: tree: https://github.com/ammarfaizi2/linux-block palmer/linux/riscv-pmu head: 33363c336516e4beb9dd7e8265b369ff96d07dcb commit: 4905ec2fb7e6421c14c9fb7276f5aa92f60f2b98 [13/15] RISC-V: Add sscofpmf extension support config: riscv-randconfig-r006-20220320 (https://download.01.org/0day-ci/archive/20220322/202203222137.eK8TFhiJ-lkp@intel.com/config) compiler: riscv64-linux-gcc (GCC) 11.2.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/ammarfaizi2/linux-block/commit/4905ec2fb7e6421c14c9fb7276f5aa92f60f2b98 git remote add ammarfaizi2-block https://github.com/ammarfaizi2/linux-block git fetch --no-tags ammarfaizi2-block palmer/linux/riscv-pmu git checkout 4905ec2fb7e6421c14c9fb7276f5aa92f60f2b98 # save the config file to linux build tree mkdir build_dir COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=riscv SHELL=/bin/bash drivers/perf/ If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot All warnings (new ones prefixed by >>): drivers/perf/riscv_pmu_sbi.c:42: warning: cannot understand function prototype: 'union sbi_pmu_ctr_info *pmu_ctr_list; ' >> drivers/perf/riscv_pmu_sbi.c:498: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * This function starts all the used counters in two step approach. vim +498 drivers/perf/riscv_pmu_sbi.c 496 497 /** > 498 * This function starts all the used counters in two step approach. 499 * Any counter that did not overflow can be start in a single step 500 * while the overflowed counters need to be started with updated initialization 501 * value. 502 */ 503 static inline void pmu_sbi_start_overflow_mask(struct riscv_pmu *pmu, 504 unsigned long ctr_ovf_mask) 505 { 506 int idx = 0; 507 struct cpu_hw_events *cpu_hw_evt = this_cpu_ptr(pmu->hw_events); 508 struct perf_event *event; 509 unsigned long flag = SBI_PMU_START_FLAG_SET_INIT_VALUE; 510 unsigned long ctr_start_mask = 0; 511 uint64_t max_period; 512 struct hw_perf_event *hwc; 513 u64 init_val = 0; 514 515 ctr_start_mask = cpu_hw_evt->used_hw_ctrs[0] & ~ctr_ovf_mask; 516 517 /* Start all the counters that did not overflow in a single shot */ 518 sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_START, 0, ctr_start_mask, 519 0, 0, 0, 0); 520 521 /* Reinitialize and start all the counter that overflowed */ 522 while (ctr_ovf_mask) { 523 if (ctr_ovf_mask & 0x01) { 524 event = cpu_hw_evt->events[idx]; 525 hwc = &event->hw; 526 max_period = riscv_pmu_ctr_get_width_mask(event); 527 init_val = local64_read(&hwc->prev_count) & max_period; 528 sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_START, idx, 1, 529 flag, init_val, 0, 0); 530 } 531 ctr_ovf_mask = ctr_ovf_mask >> 1; 532 idx++; 533 } 534 } 535 -- 0-DAY CI Kernel Test Service https://01.org/lkp