Re: are volatile and memory barriers necessary for single threaded code?

[Pavel Begunkov <asml.silence@gmail.com>]

On 04/05/2020 19:54, Lorenzo Gabriele wrote:
> Hi everyone,
> I'm a complete noob so sorry if I'm saying something stupid.
> I want to have a liburing-like library for the Scala Native language.
> I can't easily use liburing itself because of some limitations of the
> language.. So I was rewriting the C code in liburing in Scala Native.
> The language is single threaded and, sadly, doesn't support atomic,
> nor volatile. I was thinking what are the implications of completely
> removing the memory barriers.
> Are they needed for something related with multithreading or they are
> needed regardless to utilize io_uring?

Long story short, even if your app is single-threaded, io_uring is _not_.
I wouldn't recommend removing it. See the comment below picked from io_uring.h

/*
 * After the application reads the CQ ring tail, it must use an
 * appropriate smp_rmb() to pair with the smp_wmb() the kernel uses
 * before writing the tail (using smp_load_acquire to read the tail will
 * do). It also needs a smp_mb() before updating CQ head (ordering the
 * entry load(s) with the head store), pairing with an implicit barrier
 * through a control-dependency in io_get_cqring (smp_store_release to
 * store head will do). Failure to do so could lead to reading invalid
 * CQ entries.
 */


More difficult to say, what will actually happen. E.g. if you don't use polling
io_uring modes, and if you don't do speculative CQ reaping, there is a pairing
smp_rmb() just before returning from a wait. But, again, the io_uring ABI
doesn't guarantee correctness without them.

-- 
Pavel Begunkov