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From: "Christian König" <christian.koenig@amd.com>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Li Wang <liwang@kylinos.cn>
Cc: Arnd Bergmann <arnd@arndb.de>,
	Sumit Semwal <sumit.semwal@linaro.org>,
	linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org,
	linaro-mm-sig@lists.linaro.org, io-uring@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	Mengmeng Zhao <zhaomengmeng@kylinos.cn>
Subject: Re: [RFC PATCH] misc: fgds: enable GPU-NVMe direct I/O via POSIX and io_uring
Date: Wed, 9 Sep 2026 15:45:34 +0200	[thread overview]
Message-ID: <33c9db65-fa30-4d34-9026-98144ce1ed95@amd.com> (raw)
In-Reply-To: <2026090924-corsage-shout-833d@gregkh>



On 9/9/26 15:35, Greg Kroah-Hartman wrote:
> On Wed, Sep 09, 2026 at 06:42:03PM +0800, Li Wang wrote:
>> Hi Greg,
>>   Thanks for the review!
>>
>>>
>>> That's not really needed in a changelog text, it could be in the 0/X
>>> patch :)
>>>
>> Sorry for the clutter. I will move most of them into the 0/X patch in v2.
>>
>>> Anyway, you didn't cc: the io_uring list, why?
>>>
>> `scripts/get_maintainer.pl` didn't output the io_uring mailing list, likely 
>> because this patch doesn't directly touch the io_uring codebase itself. It only 
>> enables remapping GPU memory buffers to CPU virtual addresses, which can then be 
>> consumed via standard io_uring APIs.
>>
>> I've added io-uring@vger.kernel.org to CC for this reply and will keep it in v2.
> 
> Great, as you are using that as the api, there might be some parts that
> will need to be reviewed by them.
> 
>>> Nor why "fgds" is the name, that's going to be hard to remember, does it
>>> stand for something?
>>>
>> "FGDS" stands for Fast GPUDirect Storage. GPUDirect Storage (GDS) is NVIDIA's 
>> technology enabling direct I/O between GPU memory and files on NVMe, 
>> widely used in LLM workloads to bypass CPU overhead.
> 
> That's nvidia's specific solution, but this works on other devices,
> right?  Or just for that one platform?

That was nvidia's specific and very hacky out of tree solution which as far as I know is pretty much abandoned everywhere.

AMD came up with something similar, but all those approaches are so fundamentally broken that we didn't even considered upstreaming it.
> And you are using this as a "bypass" for the normal accel subsystem,
> shouldn't this be part of that subsystem instead of a custom user/kernel
> api like you are creating here?

As far as I know there is a patch set under review and even already partially merged which enables exactly that functionality as general feature for DMA-buf which is vendor independent and should at least in theory work with all drivers.

I'm really surprised that somebody is still working on the vendor specific stuff.

Regards,
Christian.

> 
> thanks,
> 
> greg k-h


  reply	other threads:[~2026-09-09 13:45 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20260908131545.105987-1-liwang@kylinos.cn>
     [not found] ` <2026090913-landline-encroach-c544@gregkh>
2026-09-09 10:42   ` [RFC PATCH] misc: fgds: enable GPU-NVMe direct I/O via POSIX and io_uring Li Wang
2026-09-09 13:35     ` Greg Kroah-Hartman
2026-09-09 13:45       ` Christian König [this message]
2026-09-10  3:57         ` Li Wang
2026-09-10  8:35           ` Christian König

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